What was the most challenging design problem you ever had to solve?
Asic Engineer Interview Questions
1,076 asic engineer interview questions shared by candidates
Questions on digital electronics ,aptitude ,logical reasoning etc
Projects discussion. Interview questions are based on STA, CMOS , Low power, Verilog coding Clock domain crossing, Clock Tree synthesis & Crosstalk
2 questions- one about setup+Hold and another about implementing logic with 8 bit input that counts how many times the same numb have appeared - known that it is less than 10 times
Design a logic that detect three asynchronous pluses that can came at anytime with one counter. Set up hold, cdc questions Verilog questions Lint
Questions on constraints and assertions
Questions regarding library creating and area of the cells in the library
Designing multiple Gates or some basic logic using Multiplexers. Draw state Diagram & verilog code for 1010 sequence detector.
Antenna Effect, latch up
Explain about the AXI write process with signal descriptions
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