Design a hardware to detect how many bits are 1 with only combination logic design
Hardware Asic Design Engineer Interview Questions
5 hardware asic design engineer interview questions shared by candidates
After you design the hardware in Q1, try to design another hardware to show the index of the bits at the same time.
1.Inverted temperature effect on STA. the question was based on temperature effects on delay below 65nm technology. how STA works under those conditions at different corners. 2. An interesting question about how latency affects jitter. 3. Maximums kew allowed when lock up latches are used. 4. OCV n questions based on it. 5. CRPR. 6. how does a cell get min n max delay? 7. spef file contents, questions about star-rd extractor working. 8. Internship exp based questions.
Design a FIFO hardware
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