Decimal to gray function with logic gates
Asic Engineer Interview Questions
1,076 asic engineer interview questions shared by candidates
Be strong in your basics
Why do we use gray code in sampling than binary? Depth of Fifo. writer is writing 6 locs in 10 units and reader is reading 60 locs in 100 units. But both of them once they start they keep reading /writing. Depth of buffer ? (Ans. 24) It took some for me to understand. His accent was weird. Puzzle: There are 30 people in party. What is the probability that no two of them have birthday on same date ? (you will find this on careercup)
about my resume, to explain a project
Setup/hold validation calculate, FSM design questions
Text book based questions. Really boring
1. Write the output of rc filter without s domain analysis 2. Virtual short question that all
1) draw nand gate using diodes and transistors 2) by using nand gates design flip flp. 3) By using flip flop design counters
Explain how you would verify corner cases and handle timing constraints in your verification approach.
clock tree synthesis
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