Coding in C to output Fibonacci
Asic Engineer Interview Questions
1,076 asic engineer interview questions shared by candidates
implement a counter, analyze signal diagram
What will be the multicycle be for 0 cycle paths?
Design some circuit using 2x1 mux only. Design a CMOS and gate
How do you divide clock
Design an arbiter.
What is setup/hold time?
Flash adc can be used for 15 bit.
Logic question to verify the design How would you verify 3 blocks with incorrect label ? suppose one with apple 2 with orange 3 with apple & orange.
White-board diagram of a block with one input pin (+ clock), and one output pin. The input is a serial stream of data. The output =1 whenever the pattern "0110" has been seen on the serial data. Everything is synchronous to the clock input. Write the Verilog. Given the shortened time constraint for the interview, diagram the design solution. In addition to what you come up with, write a bubble diagram for an FSM solution.
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