5-year goal and about personality. they also asked about what challenged I faced in my day to day work and within a team.
Asic Engineer Interview Questions
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Setup and hold time for circuits
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Algorithm for finding 2 highest number in given series
1. what is the max freq of a given circuit.(setup and hold analysis related) 2. one question was related to stuck at fault. we need to find out the input test pattern in order to detect the stuck at fault of given circuit. 3. IN1?A:IN2?B:IN3?C:1'b0 How many 2:1 mux are required to implement this? 4 one question was related to FIFO Depth calculation. 5. In a given circuit to meet timing how many no of re timing flops need to be inserted?(you should be clear with setup analysis) 6. Questions were related to transistor sizing and cache memory hit and miss ratio. 7. One puzzle was also asked of Annual function and van related(don't remember exactly. :p)
i had 3 question: the first one is if some one drive from spot A to spot B in spped of V1 what is the speed he need to come back from B to A for that the average speed will be 2V1
AND & OR gate from 2-1 MUX.
Describe an application where you would use a latch?
Design a two bit single cycle multiplier Write a code to check if it is palindrome or not? FSM to count the series of 1's. Single bit input per clk. Series of 1's must start and end with a 0
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