I had a phone screen - basic SV and UVM multiple choice questions. Second round - OOPs concepts, some verification concepts (types of coverage, stimulus).
Asic Engineer Interview Questions
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related to RTL and UVM
System verilog, UVM scoreboard/monitor coding
Setup-Hold timing inter-relationship question, framed by way of max frequency of operation
Provided a waveform and asked to design a circuit for that.
1. Some simple random stimulus with specified constraints
What will gm change if we enlarge the W/L of a transistor by 2. Compare the gm of a BJT and MOS device. Slew rate problem
Cache
Sequence detecting FSM, coding it in Verilog
Design Questions and some logic questions
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