cmos fundamentals, rtl design, verilog, physical design flow, static timing analysis and some aptitude questions
Asic Engineer Interview Questions
1,076 asic engineer interview questions shared by candidates
Describe a project where you have to regularly communicate with team members.
Brief explanation about projects done
Whats inside a SRAM?
Everything was easy. Counter Design using Moore Machine, Counter Code in verilog, Clock Domain Crossing Questions and MCP in PT
Phone interview questions: 1. How do you achieve run time polymorphism? 2. What is meant by casting of objects?
What was my most challenging project? And how would I verify the correct functionality of it?
they will ask you basic problem based question to test ur skills
Was asked about basic protocols for PCIE. Basic questions on CDC. Types of violations that the CDC tools complain - eg: no_sync, combi logic before double sync, multi bit double syncing, re-convergence etc. Code async reset FF and sync reset FF. What are the dis/advantages of one over the other.
Lots of questions about pmos and nmos (how to build nand gates, inverters), etc, how a pll works, how different things affect the output, transmission lines (parasitics, series vs parallel etc), flip flops, latches, op amps (designing lots of different op amps and discussing their rules)
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