RTL program that covert j-k flip flop to D flip flop
Asic Engineer Interview Questions
1,075 asic engineer interview questions shared by candidates
Familiarity with tools and with verification like UVM
General timing, design related questions.
Asked me about verilog and sv and TLM
How to solve a specific problem.
Design a system that sorts 6 numbers from least to greatest using black boxes that can sort 2 numbers.
Asked about previous experience that would help me in the job here. was for an entry level position. also trying to find out if the training they provide would be useful to me to perform the tasks of the position
The total schematic area about one of my project.
given two systems with an 8 bit connection. the sending system works at a frequency twice as fast as the system its sending to. what digital logic (gates, flip flops) should you put in order to have the systems work together? the slower system can have parallel computing
> Asked questions related to fifo. Was not a direct question , they have explained a particular scenario with combination of fifos along with pictures , and the question will be crystal clear. > Multiple questions were there based on basic test bench architecture and how to build a test bench with a given design as example
Viewing 171 - 180 interview questions
See Interview Questions for Similar Jobs
Vlsi Design EngineerSenior Vlsi Design EngineerVlsi EngineerAsic Physical Design EngineerSenior Asic Design EngineerSoc Design EngineerRtl Design EngineerHardware Asic Design EngineerPhysical Design EngineerSenior Dft-ingenieurHardware Engineering ManagerHardware Asic Ontwerp IngenieurSenior Fpga Design EngineerFpga Design EngineerFpga Development EngineerSenior Hardware Design EngineerSenior Asic Fpga Design EngineerAsic Design Verification Engineer