questions on digital electronics and verilog
Asic Design Verification Engineer Interview Questions
97 asic design verification engineer interview questions shared by candidates
What is your experience with random constrained stimulus?
show how code coverage and function coverage works. explain with code
APB and AXI protocol explation with all signals.
Draw the circuit base on the coding provided
Abstarct class vs Interface, inheritance,polymorphism…..etc Observer and Factory DP in details. Log file output analysis. Behavioural questions. Giving basic and simple designs with some specifications and elaborate a strategy to verify it.
Basics of UVM and SV
what is a asic design?
technical- counter, data types (enum, struct), blocking and non blocking assignments. Aptitude- mixture and allegation, ratio and proportion, distance and speed, percentage, population based question.
Tell me about yourself.
Viewing 51 - 60 interview questions
See Interview Questions for Similar Jobs
Fpga Development EngineerAsic Verification EngineerHardware Asic Design EngineerFpga Design EngineerVerification EngineerVlsi EngineerDesign Verification EngineerVlsi Design EngineerFpga DeveloperSenior Asic Fpga Design EngineerFpga EngineerSenior Vlsi Design EngineerSenior Dft EngineerSenior Asic Design EngineerDesign VerificationCpu Design EngineerSenior Fpga Design EngineerDigital Asic Design Engineer