MATLAB functions, DSP related questions;
Verification Engineer Interview Questions
2,556 verification engineer interview questions shared by candidates
Questions about past experience with Verilog and VHDL
Why modport is used? What is polymorphism? What is deep copying ? what is inheritence? Why we are writing interface? Different Phases in UVM? Which phase are task and which are functions?
It was a quetion about linked lists.
It was a quetion about pysical memroy.
detailed test plan for a synchronous fifo
How to convert hexadecimal to decimal.
Draw a NAND using cmos gates
How to verify a design when the frequency change?
tlm and its benefits. difference between blocking and nonblocking transactions
Viewing 2541 - 2550 interview questions