Questions were allright - basic ASIC, STA questions.
Physical Design Engineer Interview Questions
595 physical design engineer interview questions shared by candidates
how to solve setup violation? What the solution would impact on the other part of the design? how to deal with the SI issue? Clearly know about the calculation of setup time, or min clock period What is OCV on timing check？how to calculate? What is the CPPR?
implement A XOR B by NAND only
Write the Verilog code for a up counter
Implement integer division
1.Mostly all the questians where related to the project done and from there they will ask multiple questians based on the answer. There where only 2-3 questians which was directly asked, all others where from project done.
all technical questions none was difficult for me
Cadence virtuoso tool related questions, about layouts , DRC and LVS
DCG related, how to fix timing? Verilog RTL case x, case z, DFF, Dlatch Perl scripting TCL scripting in PT ICC Design patitioning
Q : explain all basic concepts of STA
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