1. Create a syn chronic circuit which calculates an average of 8 cycles of inputs. 2. create an algorithm which randomize an array.
Logic Design Engineer Interview Questions
66 logic design engineer interview questions shared by candidates
Explain pipelining, how did I implement it in my RISC microprocessor project
You need to design a logic system with input of a stream of bits and it needs to detect a known chunk of bits, e.g. '1000'. First, implement a naive system. What are the inputs and outputs? Which logic gates, modules and blocks do you need? Analyze it with respect to timing, efficiency, hardware usage, etc. Second, try to come up with a more efficient implementation. Analyze it again. Compare the two implementations.
1. Comp Arch - Cache coherence protocols, Out of Order implementation 2. FSM design - coding 3. C program for 2nd smallest number in array
the aske me to plane a system to a factory who produce wood logs of two length - 49 meter and 51 meter . The system will get inputs from two sensors that are set when they "see" a wood log benith them. the sensorse are 1 meter apart whatching the platform of the factory. the factory is allways working and there is 1 meter gap between the logs on the platform.
A lot of timing related questions, (setup - hold) half/full adder
Tell me about yourself Technical Questions 1) Different ways to implement a mux in Verilog
Multiply 24 with a given 4-bit binary number
cache - set associative - pipelining -
Use 2-to-1 MUX to build an or gate. Use full adders to count the number of 1's in a 7-bit number.
Viewing 21 - 30 interview questions