Lots of questions were asked & was made to solve many problems based on 3 subjects above. They were more interested in your knowledge than whatever u have written in cv.
Logic Design Engineer Interview Questions
66 logic design engineer interview questions shared by candidates
Design a full adder using only a special gate F= (not A)B+C Note: Do not use any type of gates except the special gate, we should not even use NOT gate while designing
Do we need PC to index second level table of branch predictor (i.e. pattern history table)? Why? What if bits of PC more than bits to index to pattern history table?
Resume questions (describe your contributions to your projects, etc) What is a d flip-flop, setup/hold time, cache questions, algorithms (how to organize a list of names with a corresponding piece of data - eg. linked list/BST)
Design a combinational circuit that detects the number of overlapping 111 when a byte is passed serially?
Have you ever thought about implementing your knowledge from computer architecture into verilog/VHDL
ff structure description with most detatils you can. it was kind of deep solution so I needed to understand all the pd considerations and et. was very very interesting. priority encoder questions and planning questions that I was aware of from my university studies.
Fifo depth calculation - different read and write frequency and burst size
See interview process, the questions are listed in there
How to apply what we learned from school to the current going on project? Some verilog coding questions. Basic logic design questions. More on the verilog project we did at school for a RISC processor.
Viewing 11 - 20 interview questions