It was a written test with 4 parts of question, Giving a option to us to choose 3 parts among the 4, But with Aptitude compulsory. 1) Aptitude(10Q) 2)Digital circuit designing 3)Cmos and Vlsi design and 4)Vlsi coding verification questions
Asic Design Engineer Interview Questions
709 asic design engineer interview questions shared by candidates
what is an FSM
Explain setup and hold time.
Explain CDC and how can it be addressed?
How do you convince design team that a DUT has been thoroughly verified?
Clock divide by 3
ASIC Design Flow steps
What should be the size of the buffer in a FIFO receiving data packets at a certain rate?
How do you deal with the different frequencies and voltages between voltage islands that are controlled by dinamic voltage and freq scaling.
FSM of sequence detector 01101
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