Design an FSM for a 2-clock system
Verification Engineer Interview Questions
2,559 verification engineer interview questions shared by candidates
Computer architecture, some verification questions
There are block box modules, and you know nothing about what they are doing, behaior, output, input. Can you create a verification TB for it?
What is gray code and 8b10b encoding, and why they are useful
Q. What are all run-phases and in detail discussion about it Q. Basic constraints related to dist, and assertion
1. What are the pros and cons of adding an extra stage in a CPU 2. Follow-up: How does adding a stage affect the setup time and hold time
Computer Architecture, Coding in SystemVerilog
write HDL code for a FSM
cache coherency related like MSI
FSM, SystermVerilog, and software leetcode related questions.
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