What was my background related to the position.
Verification Engineer Interview Questions
2,559 verification engineer interview questions shared by candidates
explain the projects mentioned in the resume. and subsequent questions
Questions related to Pipelining, Interrupt Handling.
Write constraints for unique elements in an array. Write assertions for different scenarios of AXI protocol. Basics of UVM including testbench components, phases, TLM ports.
Questions on protocols like API, AXI, AHB, API, UART.
Draw internal cmos crcuit for nand, nor gates. Bandwidth of opamps. Solve basic opamp circuits. They focus more on fundamentals of both analog and logic design. Also focussed on vhdl as it was used a lot for modeling in that group.
Do you have any idea of what cache coherency means?
How does routing work end to end
role related, linux based, previous experience based and Manager round
About digital electronics and Verilog
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