All the questions were pretty basic and were related to fundamentals of logic design and verification.
Verification Engineer Interview Questions
2,564 verification engineer interview questions shared by candidates
Identify the circuit that the given FSM corresponds to, timing based questions, optimize the circuit. FSM was that of a simple counter
Know everything in c++. Virtual functions/class. Polymorphism. Be ready to write code on the spot
Draw two stage CMOS amplifier explain its operation derive gain and output impedance number of poles and zeros and find them comment on stability and frequency compensation
Design a state machine to detect bit sequence. How do you verify it?
Q: How to calculate the depth of FIFO?
How to make nor gate using two input mux
Draw the truth table for a NAND gate.
What are your career goals? Where do you see yourself in five years?
Describe what tests need to be done on memory
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