implement 4-2 priority decoder to 16-4.
Verification Engineer Interview Questions
2,565 verification engineer interview questions shared by candidates
1st phone interview: Basics of Verilog. Explanations for different projects on resume. 2D array containing image data, how will you rotate the matrix to rotate the image by 90 degrees clockwise? try to use least memory(i.e) rotate and store in the same input matrix.
Basic RTL Design related concepts, SV UVM basic concepts, writing scoreboard.
UVM TB questions, sequence, sequencer and driver protocol, SV randomization questions
Explain the difference beteween Blocking vs Non-Blocking Assignments.
Typical Scoreboard Structure. What is an Analysis Port?
Signal processing in the communication system.
What is the representation of implication using and,or and not logic gates
Complete verification environment and connections
Some standard programming questions, hardware and power specific design questions, as well as test philosophy.
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