It gets very technical ranging from Electrical fundamentals to RF fundamentals and then they start to dig deep on each aspect. Know your chip caps really well! I was asked questions on smith charts, imedance matching, typical RF receiver/transmitter systems, signal integrity issues, characteristics of RF amps. As far as behavioral questions were concerned - challenges faced in your last project, how did u solve it and what would your ex boss say about you if I asked him for a reference.
Verilog based basic questions , SV and UVM questions
How to implement one hot encoding
What are the event regions
Introduce yourself. Asked to write code for clock generator (verilog) And also in contraintns ( SV)
1. Sv, uvm environment question 2. Coding of UVM architecture 3. Digital electronic 4. AMBA protocol
D flip flop and its working and basic gate coding's
They asked Digital questions, verilog
Basic digital design Verilog Python Digital verification concepts
Difference between virtual sequencer & virtual sequence.
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