How many type of multiplexer and what is the application. Explain how 2 to 1 multiplexer with 9 input.
Soc Engineer Interview Questions
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1. Static timing analysis q. setup/hold , FF , latch
1. what are inertial delay and transport delay? 2. Circuit using D latch, master slave FF & explain it 3. how u will reduce the input frequency? draw the circuit & explain 4. D FF Verilog code
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Sorting of an array
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how tool optimize the area in synthesis process?
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A train crosses a platform in 36 secs and a pole in 18 secs and some other data was given and we were required to find the length of the train
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