Current mirror biasing, draw I vs V
Rfic Design Engineer Interview Questions
46 rfic design engineer interview questions shared by candidates
Smith Chart... Regions (inductive, capacitive, matched)
Some questions relates to projects on my resume. Some basic analog question about current mirror , bode plot, rc filter , bias circuit structure
Describe a CMOS current mirror.
Q: What was the hardest thing that you designed
Explain some of your past designs. Then follow up was more details and questions about designs.
Fundamentals of RFIC circuit design, impedance matching, noise analysis, system-level analysis
Digital questions related to verilog
Gave a cascoded current mirror and asked to plot the current. Asked to do a ac analysis of a nmos with a current source.
What is differential amplifier gain? How can you increase it? How can you play with the parameters which will affect differential amplifier gain?
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