Physical design flow Antenna effect LVS and DRC checks
Physical Design Engineer Interview Questions
595 physical design engineer interview questions shared by candidates
What tools were used
What are the inputs of PNR flow? What is Skew, latency difference between them? what is setup/hold violation, which one has high priority? what is congestion and how to solve them? what are the inputs of the PNR stage? what is clock_timing?
Interview questions compromised of aptitude and technical. Technical questions includes 1. Working and construction of pmos,nmos. 2. Latch up 3. Synchronous and asynchronous circuits. 4. Digital electronics (flip flop,counters,mux...)
Design and gate using nand gate
digital electronics basics and physical design questions
Related to my course physical design
Interview questions were on physical design flow and static timing analysis floorplan placement clock tree synthesis routing
Proper Asic design explaination
How did you resolve congestion in your project?
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