Can you work in high pressure? and fast pace
Ic Design Engineer Interview Questions
327 ic design engineer interview questions shared by candidates
Q:Technical round they asked me to draw a Digital circuit with ousing only NAND gate.Then a FSM for 1101 and implememt it in Verliog later there were some branch out questions on FSM. Clock domain crossing was also asked and some questions(GATE Level) on setup and hod time violations.
The 1st one they asked some questions based on the CV and also asked some basic questions about circuit, amplifier and C programming. 2nd they asked a lot on my CV.
Issues related to master thesis
logic quiz and to solve a problem with C program
How to design a counter to count the rising/falling edge of a signals; how to use RTL to realize I2C EEPROM protocol.
Corner case verification in FSM.
tree search algorithm
divide by 3 SM, with some more talks on evaluating the machine
behavioral code of a DFF, Power management issues etc
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