1.Inverted temperature effect on STA. the question was based on temperature effects on delay below 65nm technology. how STA works under those conditions at different corners. 2. An interesting question about how latency affects jitter. 3. Maximums kew allowed when lock up latches are used. 4. OCV n questions based on it. 5. CRPR. 6. how does a cell get min n max delay? 7. spef file contents, questions about star-rd extractor working. 8. Internship exp based questions.
Showed me a schematic asked what a resistor and diode do in the circuit.
struttura di sincronizzatori di clock
What are techniques to extend the bandwidth of a CML differential pair.
Why you plan to find a new job
Few math puzzles: boxes and balls in it. with exactly one measurement find the odd one out
How many times does the minute hand cross the hour hand on a clock in 24hrs
written test, 20 quants apti ,10 c ques,10 logical,2 program(delete a duplicate, add $ symbol at every multiple of 6) and one behavioral ques(one thing to change a world)
op-amp
How would you build a power source with 120V AC input and 5V DC output
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