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Fpga Engineer Interview Questions
542 fpga engineer interview questions shared by candidates
I was presented with a clock signal, an input signal, and an output signal and asked to design a system that would produce an output signal given such an input signal.
It was good mostly focused on basics?
This was an entry level position. Basic questions were asked about FIFOs and metastability. Then I was asked to code an RTL Design for an Ethernet cable. Had to dissect packets of data and extract the payload while discarding everything else.
Take the product of the microwave as an example, how will you define the design specifications?
Write a rtl code for the given pulse and verifiy it using a linear test bench
Bester IP-Core in letzter Zeit?Funktionsweise, Probleme Herangehensweise.
I declined moving forward with the interview after a certain point
Asked me just about counters, ripple, etc.
design a module using any HDL that recives pulses and the goal is to detect 10 pulses within 100 cycles, the interesting part is the ability to detect 10 ulses from the moment we get each pulse. for example: lets say we get a pulse start counting the 100 cycles, if we reach 10 pulses before the time ends then start counting from the time we received the second pulse until the eleventh and so on.
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