Lots of questions about pmos and nmos (how to build nand gates, inverters), etc, how a pll works, how different things affect the output, transmission lines (parasitics, series vs parallel etc), flip flops, latches, op amps (designing lots of different op amps and discussing their rules)
Digital Design Engineer Interview Questions
553 digital design engineer interview questions shared by candidates
See interview process, the questions are listed in there
What I excepted from the job, technically speaking.
Design FIFO module control for synchronous write and asynchronous read with given constraints (full, empty, etc)
Explain pipelining, how did I implement it in my RISC microprocessor project
What's the 2 principle of Cache.
1. Tell me something about yourself. 2. Design a gate level circuit for given specification- To find even and odd no from 0 to 8 decimal no.(without using Kmap). 3. Rate yourself in Verilog. Write Verilog code for 2:1 mux then asked the difference between assign and always. 4. Explain the project of asic design of up counter(steps of rtl coding,floorplan,PnR,CTS,STA). 5. From project of D flip flop layout they asked me about DRC rule. 6. Asked me to draw structure of FinFet and then explain it. 7. Asked me to draw nmos and pmos and explain the difference. 8. What is the difference between short channel and long channel mosfet. 9. What is Floorplan and explain any algorithm. 10. Explain the setup and hold time in latch.
Anything from coding to schematics to sta to low power to verification
What are some examples of scripts you have wrote, and give some scripting solutions to a problem, e.g. parsing timing reports.
What are the ways to reduce power consumption?
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