what is metastable state
Dft Engineer Interview Questions
107 dft engineer interview questions shared by candidates
Questions predominantly had DFT domain related questions and digital electronics concepts
1. Design a circuit that outputs a "1" for one clock cycle when the input goes from low to high 2. Given a screen where all pixels are white. Write a program that switches the screen to be completely black but in the most random way possible
TESTING RELATED: Why we need testing, Fault analysis system, JTAG, TAP Controller, BIST, types of fault, what will happen if we put nmos up and pmos down in an inverter, black box white box testing, MTTF, failure rate over product lifetime, what is D algorithm, stuck at fault, stuck open fault, stuck sort, SCAN, delay fault models, check point theorem, how to know that a primary input can be detected by what test patterns for respective stuck at faults, what happenes with XOR gate, what is level-based-analysis, what is structural and non-structural testing, why we need structural testing, testability, observability, controlability, what is level based logic simulation and why we need it? critical path tracing... etc HR Question: some 3 bulbs question he asked, there are 2 rooms, one room has 3 bulbs and another has all three switches. in just one go you need to find out which switch belongs to which bulb?
1. ATPG design basics 2. BISTs modes of work vs defects. 3. CDC testing
What motivates me when working?
1. DRC faced, simulation issues faced, how wrapper insertion works.
Rtl to gsd2 flow, dft, physical design basic, timing basic
Many clock gating questions DFT: JTAG and March algorithm questions. Scan stitching and reordering.
describe a project you worked on at your previous job.
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