Given a block diagram, how would you connect everything internally to make it work?
Asic Design Engineer Interview Questions
709 asic design engineer interview questions shared by candidates
What greek philosopher didn't write any of his works?
Basics of CMOS at transistor level.
How to realize a communication between different time domain?
what are sorts and tell different types of sorts ?
What are setup and hold time violations ? Showed me timing diagrams and asked me to explain the setup and hold times.
setup/hold timing
They ask all basic questions about VLSI
They asked aptitude questions in the written test.
Verilog code for shift register.
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