Questions on logic design, synthesis and computer architecture, such as cross clock domain issues, cache, state machine, low-power design techniques. Only one behavioural question. Also asked about past projects.
Asic Design Engineer Interview Questions
709 asic design engineer interview questions shared by candidates
Write TB for one of the projects from past experience . Describe its features and implement DUT interface connections and build TB on whiteboard .
Mostly RCG level questions.
describe how axi transaction works, valid ready
How would you design a fifo
What's your name , is it [name] ?
There are block box modules, and you know nothing about what they are doing, behaior, output, input. Can you create a verification TB for it?
Compare the analog and digital PLL, pros and cons
Wat is er al eens fout gelopen in eerdere projecten?
Theory questions on Rcmin rcmax v min vmax cmos spef cts
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