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NVIDIA interview questions

based on 3K ratings - Updated Jun 18, 2026

Average interview difficulty

Mostly positive interview experience

How others got an interview

47%
Applied online
Applied online
24%
Campus Recruiting
Campus Recruiting
16%
Employee Referral
Employee Referral
8%
Recruiter
Recruiter
2%
In Person
In Person
2%
Other
Other
2%
Staffing Agency
Staffing Agency

Interview search

3,001 interviews

ASIC Interview

Nov 25, 2014

Anonymous Interview Candidate

No offer

Difficult interview

Application

I applied through college or university. I interviewed at NVIDIA in Aug 2014

Interview

Contacted by HR. Was asked questions on digital logic design, static timing analysis and c programming. Interview was purely technical. The difficulty level was high. Question 1. What is setup time? what is hold time? Question 2. Which is better setup or hold time violation? Question 3. If we have a setup constraint in the given circuit how can we solve it? Question 4. Was given a circuit and told that there is a setup violation, how to solve it?

Interview questions [1]

Question 1

Which is better, setup time or hold time violation?

1 Answer

Intern Interview

Nov 18, 2014

Anonymous Interview Candidate

No offer

Application

I interviewed at NVIDIA

Interview

I had 3 phone interviews and I thought they went pretty good. But, the offer was declined. Not sure what went wrong. I must admit that I did not express too much enthusiasm in their work.

Interview questions [1]

Question 1

Questions were straight forward. Reversing a string word by word, bit operations etc

Answer question

ASIC Design Engineer Interview

Nov 17, 2014

Anonymous employee

Accepted offer

Positive experience

Average interview

Application

I applied online. The process took 6 weeks. I interviewed at NVIDIA (Beaverton, OR) in Oct 2013

Interview

Applied online at myfuture@nvidia.com & hr@nvidia.com; one round of phone screening and then 6 rounds onsite. Phone screening lasted an hr. Got call for onsite within a week. Great interviewers. All qs lead to interesting discussions. They concentrate on your approach rather than the exact right answer and would help you reach the right answer.

Interview questions [1]

Question 1

STA, power analysis and optimization, asynchronous fifo, clock domain crossing,seq detector fsm, counter, other verilog problems, synthesis, minor verification qs, comp arch topics like out of order execution, tomasolu, cache,

Answer question

Viewing 2516 - 2520 of 3,001 Interviews

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