Discussed C++ Pointers. I was not expecting that topic. Also, Async Fifos, Dynamic Arrays in SV.
Verification Specialist Interview Questions
3,649 verification specialist interview questions shared by candidates
How do you connect UVM objects.
it was not that difficult.
Questions regarding STA mode and Transactor based Simulation Acceleration: How would you implement a transactor? Use SystemC or System Verilog and why? How will you communicate between the DUT and the transactor testbench? Explain the PCIe speedbridge interface and how would you debug it?
Few questions on LDO and Bandgap reference
Single ended CMOS based differential amplifier operation Mark inverting and non inverting terminals Derive expression for gain and output resistance and it's poles and zeros
Q: What is the use of the factory in UVM?
Basic electronics question - 2:1 Mux, truthtable, DFF, FPGA design flow
Virtual Methods , Virtual classes and their difference in system verilog
Questions around GPU pipeline and how it works. Command streamer etc
Viewing 3441 - 3450 interview questions
See Interview Questions for Similar Jobs
Employment Verification SpecialistTeletherapyTrainResidential Treatment CounselorCenter DirectorGerman Customer Service AgentExecutive Sales ProfessionalDevelopmental TherapistBehavioral Educational TherapistPart Time Professional CounselorResidential TherapistWork From Home Reservations Sales RepresentativeField SalespersonMeter Technician Customer ServiceResidential TreatmentCall Center Team SupervisorChild Development CounselorChild Services