Most of the interview questions are based on my internship roles and responsibilities.
Software Validation Interview Questions
2,442 software validation interview questions shared by candidates
1. assertion in system verilog 2. differences on task and function in system verilog 3. CMOS problems. 4. Capacitors are connected in series and parallel problems. find total capacitance, charge and voltage across the capacitors 5. What are generator clocks 6. diff between reg, wire and logic 7. detail on blocking and non blocking assignment 8. Inheritance concept in system verilog and how do you implement it 9. Explain full adder truth table (Please explain in words, I did a great blender by explaing line by line with numbers 10. virtual interfaces 11. how do you implement syncronous reset and asyncronous reset 10.
Function to swap 2 numbers Find most occurring number
traffic light design and Fibonacci
1. Closing brackets problem 2. Number of 1’s in the binary representation of a number 3. Whether a number is 2^k for some natural k
What are your strengths and weaknesses? How do you manage your time?
Endian Swap
Explain setup and hold time
Perl, C++ questions mainly and also basics of Nmos and Pmos.
Do you know any Verification Methodology?
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