1. Few questions on writing constraints for certain scenarios. 2. FSM for number divisible by 3 3. UVM subscriber, sequences, TLM ports and FIFO. 4. write code for random number generation for given distribution and ranges. 5. byte addressing in an integer memory system. 6. constrain for non-overlapping segment-addresses generation. 7. Explain any testbench architecture you have worked on. 8. Lots of simple questions to test SystemVerilog and OOP concepts.
Some system verilog Questions
Draw an XOR out of NAND gates, logic minimalization, draw FSM for given signals and how many flip flops are needed to implement the design?
Basically covered VLSI basics, ASIC flow basics (each step) and scripting. Friendly chat for behavioral interview.
Basics of digital,. VLSI design etc
CMOS inverter questions. Power related questions
Area of the design in my past project. Best design practices. Antenna effects.
explain what happens in PN diode.
Pseudo code for MUX Setup and hold time
1) You need to get my Smart Tv from my home without me knowing or my family members alerting me .Describe the whole scenario. 2) what kind of company information you would not use on VirusTotal platform ??
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