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Rtl Design Engineer Interview Questions
185 rtl design engineer interview questions shared by candidates
1st round - basic of digital electronics , basic of verilog , RTL basics , frequency divider fkt, flip flops and latches all the basic things about VLSI 2nd round- some basic technical discussion and about my project work
Basic Digital Design Questions
Difference b/w SRam DRAm
He asked to write code Verilog FSM
One of the tough questions was that you are given some data table for two communicating blocks . you are supposed to calculate latency and bandwidth. struggled to find out the band width.
Explain setup time and hold time
What is CDC and tricks to avoid it.
Digital questions
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