Reliability Engineer Interview Questions

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Verilog code for Dlatch, DFF?,Blocking Non Blocking? Gave a layout (color) ? asked what gate is it? Given +ve Edge Triggered FF diagram, Asked to explain what is it & How is operates? Design Full Adder with minimum gates?
Jun 9, 2012

Verilog code for Dlatch, DFF?,Blocking Non Blocking? Gave a layout (color) ? asked what gate is it? Given +ve Edge Triggered FF diagram, Asked to explain what is it & How is operates? Design Full Adder with minimum gates?

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