Setup time vs hold time/how to fix?
Physical Design Interview Questions
711 physical design interview questions shared by candidates
What if the gap between the macros increases in the floor placement..?
Questions on Level Shifters, clock domain crossing scenarios with logic circuits .
How is uncertainty determined.
Asked setup/hold time violation and how to fix
CMOS question and physical design course
What are some examples of scripts you have wrote, and give some scripting solutions to a problem, e.g. parsing timing reports.
What is setup and hold time? How to fix any timing violation? Explain the sanity checks for each stage of the PD flow? What is crosstalk, EM, antenna violation?
Question related to previous project regarding how many issue you faced
basic cmos circuits and power consumptions
Viewing 491 - 500 interview questions