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Ingeniero Vlsi Interview Questions

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225 ingeniero vlsi interview questions shared by candidates

most of the interview as about rtl hw design. The interview involved a junior and senior interviewer. It seemed like the jr interviewing was getting trained. Periodically, the interview would be stopped so that the sr interviewer could instruct the jr interviewer. it was a bit confusing if it was a real interview or a training session
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VLSI ENGINEER

Interviewed at Amazon

3.5★
Apr 29, 2022

most of the interview as about rtl hw design. The interview involved a junior and senior interviewer. It seemed like the jr interviewing was getting trained. Periodically, the interview would be stopped so that the sr interviewer could instruct the jr interviewer. it was a bit confusing if it was a real interview or a training session

digital electronics, digital vlsi design, analog vlsi design, physical design fundamentals, static timing analysis, aptitude and CMOS fundamentals focused mostly on resume and VLSI technical questions. Questions on CMOS inverter, Antenna effects, PNR flow, Shell scripts, STA fundamentals. Aptitude problems, Problems on decision making with given situations and circumstances.
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Trainee Engineer VLSI

Interviewed at Capgemini Engineering

3.5★
Aug 5, 2016

digital electronics, digital vlsi design, analog vlsi design, physical design fundamentals, static timing analysis, aptitude and CMOS fundamentals focused mostly on resume and VLSI technical questions. Questions on CMOS inverter, Antenna effects, PNR flow, Shell scripts, STA fundamentals. Aptitude problems, Problems on decision making with given situations and circumstances.

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