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5,556 entry engineer interview questions shared by candidates

They had me write code for a microcontroller. It was a basic sorting algorithm. The difficult part was the space constraint. If you weren't careful, you would run out of space if you used too much space in memory or if the project size was too large.
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Entry Level Embedded Software Engineer

Interviewed at DPS Telecom

2.9★
Feb 8, 2017

They had me write code for a microcontroller. It was a basic sorting algorithm. The difficult part was the space constraint. If you weren't careful, you would run out of space if you used too much space in memory or if the project size was too large.

1. Populate an array of numbers from 1 to N (inclusive). Given two numbers, p and q , if a number in the array is divisible by p print OUT if a number is divisible by q print THINK. If the number is divisible by both p and q, print OUTTHINK. Otherwise, print the number.
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Entry Level Software Developer

Interviewed at IBM

3.9★
Jul 9, 2018

1. Populate an array of numbers from 1 to N (inclusive). Given two numbers, p and q , if a number in the array is divisible by p print OUT if a number is divisible by q print THINK. If the number is divisible by both p and q, print OUTTHINK. Otherwise, print the number.

These are my onsite interview questions and some of them is related to my resume. 1. Given a chain of inverter, size the gates and calculate the delay; 2. Given an optimization goal, resize the chain of inverter, and recalculate the delay; 3. Given a typical 6T-SRAM, described how read and write work. Suppose we only have on access transistor but need to realize the read and write, how do you design the another access transistor? Both in analog and digital ways; 4. Given a simple charge pump circuit, figure out the waveform at certain nodes; 5. Given a ideal op-amp and 2 resistors with same value, draw the circuit gain of -1, 1 and 0.5, and in the third case, make sure that the input resistance is infinity; 6. Given a 50%-duty cycle waveform, draw the 33%-duty cycle waveform (division by 3), and draw the FSM state diagram to realize the division by 3; 7. Given a transmission line and a source with an adjustable resistance. If the load resistance of the transmission line is given, figure out the source resistance to make sure that the load has the maximum load power. If the transmission line is open on one end and connect an ideal current source at the other end, draw the voltage waveform at the output of the current source; 8. Given a rc high-pass filter and apply an input voltage step and take the output voltage from resistor, draw the voltage waveform of the resistor, and explain the waveform about its peak and rc time constant; 9. Given a self-bias amplifier with two logic inputs and one output, figure out the logic functions; 10. If the channel length of a device is cut down by 1/2, how does the unity-gain frequency change? Hint: Long and short channel devices are different; 10. Given a cs-amplifier with source degeneration (the classical continuous-time linear equalizer circuit), solve for the transfer functions, given the relative time constant positions, draw the bode plots, mainly about phase, explain why phase is positive and if this is contradictory to causality; 11. Given a 2-input nor gate, size the gate with equal rise and fall time, find out the faster input and explain why; 12. In high speed IO, why are the both Tx and Rx termination resistors matched with the characteristic impedance of the transmission line? 13. Describe your favorite project on your resume; 14. Draw the schematic of a PMOS, given the voltages of 4 terminals, and figure out the operation region of PMOS. Figure out the the output voltage of a cascaded PMOS circuit; 15. A transistor with its source connected a capacitor, apply a DC voltage at the drain, and figure out the voltage waveform of the capacitor; If you aced most of the technical questions, you are very likely to invited to be shown around the company, and then you will have the behavioral interview: 1. Tell me about yourself, like your past experience in middle school. 2. Tell me what you like about Analog Bits (usually after showing around the company). 3. What's your expectation of salary? 4. What's your hobbies? 5. Do you like your school and why? 6. When can you start? 7. If Analog Bits gives you an offer today and you get another offer from Broadcom and Qualcomm tomorrow, which one do you choose? 8. What do you see yourself in your career? 9. Give me two references.
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Entry Level CMOS Mixed Signal Circuit Design Engineer

Interviewed at Analog Bits

4.2★
Mar 14, 2015

These are my onsite interview questions and some of them is related to my resume. 1. Given a chain of inverter, size the gates and calculate the delay; 2. Given an optimization goal, resize the chain of inverter, and recalculate the delay; 3. Given a typical 6T-SRAM, described how read and write work. Suppose we only have on access transistor but need to realize the read and write, how do you design the another access transistor? Both in analog and digital ways; 4. Given a simple charge pump circuit, figure out the waveform at certain nodes; 5. Given a ideal op-amp and 2 resistors with same value, draw the circuit gain of -1, 1 and 0.5, and in the third case, make sure that the input resistance is infinity; 6. Given a 50%-duty cycle waveform, draw the 33%-duty cycle waveform (division by 3), and draw the FSM state diagram to realize the division by 3; 7. Given a transmission line and a source with an adjustable resistance. If the load resistance of the transmission line is given, figure out the source resistance to make sure that the load has the maximum load power. If the transmission line is open on one end and connect an ideal current source at the other end, draw the voltage waveform at the output of the current source; 8. Given a rc high-pass filter and apply an input voltage step and take the output voltage from resistor, draw the voltage waveform of the resistor, and explain the waveform about its peak and rc time constant; 9. Given a self-bias amplifier with two logic inputs and one output, figure out the logic functions; 10. If the channel length of a device is cut down by 1/2, how does the unity-gain frequency change? Hint: Long and short channel devices are different; 10. Given a cs-amplifier with source degeneration (the classical continuous-time linear equalizer circuit), solve for the transfer functions, given the relative time constant positions, draw the bode plots, mainly about phase, explain why phase is positive and if this is contradictory to causality; 11. Given a 2-input nor gate, size the gate with equal rise and fall time, find out the faster input and explain why; 12. In high speed IO, why are the both Tx and Rx termination resistors matched with the characteristic impedance of the transmission line? 13. Describe your favorite project on your resume; 14. Draw the schematic of a PMOS, given the voltages of 4 terminals, and figure out the operation region of PMOS. Figure out the the output voltage of a cascaded PMOS circuit; 15. A transistor with its source connected a capacitor, apply a DC voltage at the drain, and figure out the voltage waveform of the capacitor; If you aced most of the technical questions, you are very likely to invited to be shown around the company, and then you will have the behavioral interview: 1. Tell me about yourself, like your past experience in middle school. 2. Tell me what you like about Analog Bits (usually after showing around the company). 3. What's your expectation of salary? 4. What's your hobbies? 5. Do you like your school and why? 6. When can you start? 7. If Analog Bits gives you an offer today and you get another offer from Broadcom and Qualcomm tomorrow, which one do you choose? 8. What do you see yourself in your career? 9. Give me two references.

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