Draw the cross section of an inverter and describe the parasitics. What could go badly when applying a voltage lower than vdd to the gate of an inverter? Draw an OR schematic at the MOSFET level. Solve a boolean logic function and draw the truth table.
On-site: Verify 5-bit counter and write it's Verilog testbench.
Make a FSM machine for one of the projects I covered in my resume.
Write an FSM from some waveforms
Project + STA
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