verilog,projects,vhdl,tools command,c program ,vhdl concepts application,asic application and flow
Digital Design Engineer Interview Questions
553 digital design engineer interview questions shared by candidates
what is the one project you are proud of
Synchronous vs Asynchronous reset in verilog
simple questions like set up time, CDC, mux comparator
How to construct a low pass filter
Almost entirely based on CV.
not sure
Synchronous and Asynchronous D implementation, Ram Rom Cache
Using mux to realise various combinational gates
Questions were on STA, FSM, backend etc.
Viewing 421 - 430 interview questions