Most Qs is very basic calculation and concept
Design Verification Interview Questions
1,116 design verification interview questions shared by candidates
FSM, Projects, Frequency multiplier, Data types
Introduce myself and previous experience
Questions were like: 1. Make 4:1 mux using 2:1 mux 2. Make and gate using 2:1 mux 3. Difference between asynchronous and synchronous reset. All the questions were like this only.
write code which returns error if we got 10 packets within 10 seconds
DSP, OOPs Concepts, Basics CMOS based concepts
What is the difference between SV function and Verilog function?
Just asked basic questions on DSP - upsampling and downsampling
Print the relevant parts of this data file out in X,X,X format from a given list that has extra/missing bits of information.
TECH: 1. write a code that generates a random phone number 2. You have 4 processes: A, B, C, D. If any of them finishes kill B. When all of them are finished print Done. (use fork join) 3. inheritance, asks you when a child had the same function as a parent what will it print when it is called. what is different when the function is virtual. can a child object be assignment to a parent and vice versa? after the assignment you call the function and they ask you what will be printed 4. make a sequence for burst write and read, for a 32 bit (I cant remember but there was a number here also?) K memory. (you need to write an item first and then show how it is used in the sequence)
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