for the MOS opamp, what happens if W is too large
Design Ic Interview Questions
402 design ic interview questions shared by candidates
make an AND gate from two Nmos
If mirror node in ota has infinite cap how will gain and output impedance change
Accuracy of current mirror how can it be 100%
Find the maximum clock frequency
Draw the current and voltage graph about the output terminal of an opamp in an inverting negative feedback configuration if there is a resistor between the Rin and Rf resistor given the input voltage is a square wave. What happens if the non-inverting and inverting input terminals are flipped?
Write the state machine and corresponded hdl code
Fundamental analog, discreet time, switched capacitor, A/D converters.
I was fully qualified for the job and I was able to answer all of the questions as far as I remember. I remember it being more of a conversation than a set of questions. I thought the line of questioning was just fine.
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