Gave me a STA report and asked me to fix violations
Design De Ic Interview Questions
402 design de ic interview questions shared by candidates
what is this circuit?
How to cope with asynchronous input or signals transferred between clock domains?
What's the advantages and disadvantages of these methods?
rise edge detector, but with delayed out out, and additional config for neg edge
how to mitigate effects of meta-stability?
During phone round, questions were asked from my resume and about my projects. During onsite, I had 5 rounds one round digital design questions ....not too tough one round white board solutions of a logical problem using some programming language ( even pseudo code works ) one round, to talk about my favorite project One round , lunch with a teammate ...mostly behavioral One round of scripting / Behavioral questions ( having scripting knowledge is helpful )
What is your weakness?
draw a schematic of an MOS inverter write the VO/Vin from small signal equations
Draw and SAR ADC block diagram
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