Microchip asks these Verilog questions, where they give you a verilog code to guess circuit. The code I was asked: always@(posedge a or posedge b) begin if(a) y = 0; else if(c) y = d; else y = y; end
Design Coordinator Interview Questions
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Structural engineering related problems and such
2. Generate two arrays of length 10, whose elements are unique to each? Later he explained that all the 20 elements in both the arrays should be unique
The questions were : write a SV code to get unique random numbers, rand vs randc, write driver code etc.
1)Should be ready to write some logics (C/Verilog/System Verilog) on the spot . 2)Blocking and Non-Blocking. 3)Fork/join types and applications. 4)Test bench architecture blocks.(asked to write a generalized code to implement gen and bfm).
How do you combine states in a state machine. Do you actually save anything?
write a verilog code for sequence detector fsm 1001
How do you test an elevator
Basics about SOM and previous job
Roman to Int
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