Virtual memory and paging, details of reservation stations, load store ordering, cache org, role of design verif and how do you interact with them.
Cpu Design Engineer Interview Questions
52 cpu design engineer interview questions shared by candidates
Basic Computer Architecture questions. How to extend a 5 stage pipeline to 6 stages. Effects of doing that etc. A few programming questions.
one-hot assignment in verilog
Nothing out of the ordinary
Many questions are framed out of my resume in almost all rounds.
Basic digital circuit techinical questions
Out of order processor, importance ILP (and it's advantages), Digital design (realizing basic gates with a MUX)
What is a hardstuck bug you have encountered during a project?
Case in verilog
Questions were FSM , types Draw 10X11 sequence detector using mealy and more machine Verilog code for FSM Fifo FIFO depth calculation
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