Questions included RC, LC questions, 2-stage OTA, Folded-Cascode OTAs, multiple current mirrors and biasing, Miller Compensation, Pole Splitting, Switched Cap circuits, LDOs, phase plots, Buck and boost converters and different types of compensations (current/voltage mode).
What is the Miller Effect?
In an LDO what is harder to design, and nmos config or pmos config?
noise analysis in circuit design
Description de la conception d'un circuit. Donnez les équations lors de l'entretien sur place.
TI Fellow asked me this question: If you're hired, your job will be to design a power supply, that I haven't been able to figure out. How will you go about it?
I interviewed with one folk-who is a professor at Vrije Universiteit Brussel and two others whom I didn't even see nor I knew their name.The other two interviewers asked initially about my PhD projects. The main interviewer then showed a complicated circuit and asked me to analyze.
Draw an SR-latch
If I changed Vref to 1.2V to 0.2V what would you do?
If mirror node in ota has infinite cap how will gain and output impedance change
Viewing 11 - 20 interview questions