RC circuits - step, pulse, ramp response
Analog Design Engineer Interview Questions
672 analog design engineer interview questions shared by candidates
An LDO like topology was given and I was asked to find the voltage at different nodes.
What is the region of operation of pMOS and nMOS in CMOS inverter if VoL is given?
How do you design a SC amplifier? Explain the working?
Questions on Sampling, Aliasing?
asked mainly two stage op amp design,transconductance derivation of source degenerate cs amplifier and current mirrors
Suddenly stopped asking about VLSI and shifted to Advance algorithms used in VHDL coding.
Explain how your final year project can be of use to us?
Describe a project you've worked on
Current mirror pole and zero?what ratio?
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