My interview Cadence: Round 1: Comparison of cs and differential amplifier gain, Schmitt trigger(waveform and working),two switched capacitors( voltage and energy) Round 2: Inverter characteristics( different regions and working), changing supply voltage and bias voltage in a cascode ( which one will first come out of saturation), what will happen when we put a voltage vdd at input of inverter( what will be the output voltage, how circuit will act), working of bgr, max frequency in combinational circuit, 2,3 more questions on analog Round3: Compensation in bgr and 5T Ota, at each node and their comparison, what is best location for cap compensation and why? Rin , Rout , cap, gain Some more questions were there, I didn’t remember
Analog Design Engineer Interview Questions
672 analog design engineer interview questions shared by candidates
You'll be asked to solve circuit design and analysis problems. Topics may include: MOSFET operation, biasing, small-signal models Op-amp configurations, frequency response Bandgap references, current mirrors, LDOs, comparators Noise, mismatch, and layout considerations
Cascode current mirror transistor analysis
Design a OTA step by step.
They asked as to whether I was comfortable in acclimating myself to the field of Weapon simulator technology and whether I was willing to work in very adverse environments
single stage amplifiers and current mirrors
isolation strategy in SOCs.
Explain how the mismatch in threshold voltages of the differential pair input transistors results in offset voltage.
What is mux , basic level
pole-zero doublet in the current mirror
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