NVIDIA ASIC Intern interview questions

Round 1 1- Two to Three Q's on Projects done 2- Designing Q - Consider inputs coming at every clock. I want the output at time = t to give me sum of all nos coming before that time. (Adder is normal adder with latency 1) 3- Designing Q - Consider the same output needed, but adder has a latency of 2. So input is taken at every clock and output is given at every clock. But Input at t=0 is received at output at t=2, input at t=1 is received at output at t=3...