during the interview we mainly talked anout creating verification environments using UVM. additionally there were some tricky algorithm questions in system verilog. some random questions about computer architecture, like cache coherency
I applied through college or university. I interviewed at Arm (Manipal) in Aug 2025
Interview
this is campus interview , starting asking me the reklevant coursework i have in my curriculum and breif intro about them ,like low power vlsi design -what they have taught us and asked about how dynamic,static ,short circuit power dissipation happens in an inverter . ,how to reduce them , power reduction techniques at logic level ,architecture level ,after this gone for verilog , basic bolcking and non blocking ,traffic signal using delay ,projects on digital design using verilog or system verilog
Interview questions [1]
Question 1
1.difference between dynamic,static ,short circuit power diddipation ,where and how it happens ,how to reduce them
2. power reduction technoques at logic and architectute level
3. verilog
I applied online. I interviewed at Arm (Austin, TX) in Feb 2025
Interview
First round with manger of the team. It was way too theoretically technical. He asked questions like I was interviewing for his position. I am not expecting a call back from them.
Interview questions [1]
Question 1
Question 1 : How do you verify a dual port memory
Question 2 : What is layered constraints
Question 3 : What is the use of UVM
Question 4 : What is config db
I interviewed at Arm (Cambridge, East of England, England)
Interview
1 Round of digital inretview through hirevue, 90 minutes.
2 round if face to face interview, 2and half hour.
Quesntion include computer architecture and operating system
c and cpp code question
